The demand for mobile communications equipment has increased dramatically in recent years. These devices demand low power dissipation, low cost, small area chip area and high performance. Therefore, a high level of integration of transceiver and digital circuits is required. For example, power consumption is a key performance parameter for battery powered wireless devices such as personal digital assistants (PDAs), computer laptops and other devices. When using submicron CMOS technologies, there are inherent limitations relating to supply voltages and currents that may be required. These supply voltage and current limitations adversely impact power consumption and make it difficult to meet low power design objectives.
Referring now to FIG. 1, a wireless transceiver 10 is shown and includes a transmitter 12 and a receiver 14. The wireless transceiver 10 can be implemented using CMOS transistors or other transistor technologies. The wireless transceiver 10 may be integrated with a network interface card (NIC), a LAN on motherboard (LOM) for wireless data networks, with audio devices for voice communications, or with other devices.
There are multiple different ways of implementing the transmitter 12 and the receiver 14. For purposes of illustration, simplified block diagrams of double-conversion and direct conversion transmitter and receiver architectures will be discussed, although other architectures may be used. Referring now to FIG. 2A, an exemplary double-conversion receiver 14-1 is shown. The receiver 14-1 includes an antenna 19 that is coupled to a low noise amplifier 22. An output of the amplifier 22 is coupled to a first input of a mixer 24. A second input of the mixer 24 is connected to an oscillator 25, which provides a reference frequency. The mixer 24 converts radio frequency (RF) signals to intermediate frequency (IF) signals.
An output of the mixer 24 is connected to an automatic gain control amplifier (AGCA) 32. An output of the AGCA 32 is coupled to first inputs of mixers 40 and 41. A second input of the mixer 41 is coupled to an oscillator 42, which provides a reference frequency. A second input of the mixer 40 is connected to the oscillator 42 through a −90° phase shifter 43. The mixers 40 and 41 convert the IF signals to baseband (BB) signals. Outputs of the mixers 40 and 41 are coupled to BB circuits 44-1 and 44-2, respectively. The BB circuits 44-1 and 44-2 may include low pass filters (LPF) 45-1 and 45-2 and gain blocks 46-1 and 46-2, respectively, although other BB circuits may be used. Mixer 40 generates an in-phase (I) signal, which is output to a BB processor 47. The mixer 41 generates a quadrature-phase (Q) signal, which is output to the BB processor 47.
Referring now to FIG. 2B, an exemplary direct receiver 14-2 is shown. The receiver 14-2 includes the antenna 19 that is coupled to the low noise amplifier 22. An output of the low noise amplifier 22 is coupled to first inputs of RF to BB mixers 48 and 50. A second input of the mixer 50 is connected to oscillator 51, which provides a reference frequency. A second input of the mixer 48 is connected to the oscillator 51 through a −90° phase shifter 52. The mixer 48 outputs the I-signal to the BB circuit 44-1, which may include the LPF 45-1 and the gain block 46-1. An output of the BB circuit 44-1 is input to the BB processor 47. Similarly, the mixer 50 outputs the Q signal to the BB circuit 44-2, which may include the LPF 45-2 and the gain block 46-2. An output of the BB circuit 44-2 is output to the BB processor 47.
Referring now to FIG. 3A, an exemplary double-conversion transmitter 12-1 is shown. The transmitter 12-1 receives an I signal from the BB processor 47. The I signal is input to a LPF 60 that is coupled to a first input of a BB to IF mixer 64. A Q signal of the BB processor 47 is input to a LPF 68 that is coupled to a first input of a BB to IF mixer 72. The mixer 72 has a second input that is coupled to an oscillator 74, which provides a reference frequency. The mixer 64 has a second input that is coupled to the oscillator through a −90° phase shifter 75.
Outputs of the mixers 64 and 72 are input to a summer 76. The summer 76 combines the signals into a complex signal that is input to a variable gain amplifier (VGA) 84. The VGA 84 is connected to a first input of an IF to RF mixer 86. A second input of the mixer 86 is connected to an oscillator 87, which provides a reference frequency. An output of the mixer 86 is coupled to a power amplifier 89, which may include a driver. The power amplifier 89 drives an antenna 90.
Referring now to FIG. 3B, an exemplary direct transmitter 12-2 is shown. The transmitter 12-2 receives an I signal from the BB processor 47. The I signal is input to the LPF 60, which has an output that is coupled to a first input of a BB to RF mixer 92. A Q signal of the BB processor 47 is input to the LPF 68, which is coupled to a first input of a BB to RF mixer 93. The mixer 93 has a second input that is coupled to an oscillator 94, which provides a reference frequency. The mixer 92 has a second input that is connected to the oscillator 94 through a −90° phase shifter 95. Outputs of the mixers 92 and 93 are input to the summer 76. The summer 76 combines the signals into a complex signal that is input the power amplifier 89. The power amplifier 89 drives the antenna 90.
As can be appreciated, transceivers can have double or single conversion. The advantages and disadvantages relating to each transceiver architecture are generally known in the art. In the case of double conversion, the transceiver 10 performs two frequency conversion steps during transmission and reception. In the transmitter 12, the BB input signal is converted to an IF signal. The IF signal is converted to a RF signal for transmission. In the receiver 14, the RF input signal is converted to an IF signal. The IF signal is converted to a BB signal for further processing.
In the case of direct conversion, the transceiver performs a single conversion step during transmission and reception. In the transmitter, the BB input signal is converted to an RF signal directly. In the receiver, the RF signal is converted to a BB signal in one frequency conversion step.
The mixers in the wireless transceiver 10 can be implemented using Gilbert cell mixers. Referring now to FIG. 4, a Gilbert cell multiplexer/mixer 110 is implemented using bipolar junction transistors (BJTs). The Gilbert cell multiplexer/mixer 110 includes a first transistor 111 and a second transistor 112, which have an emitter connected to a reference potential such as ground or virtual ground. A base of the first transistor 111 is connected to a first lead of a first voltage source. A base of the second transistor 112 is connected to a second lead of the first voltage source.
The Gilbert cell multiplexer/mixer 110 further includes third, fourth, fifth, and sixth transistors 113, 114, 115, and 116. A collector of the first transistor 111 is coupled to emitters of the third and fourth transistors 113 and 114. A collector of the second transistor 112 is coupled to emitters of the fifth and sixth transistors 115 and 116.
A base of the fourth transistor 114 is connected to a base of the fifth transistor 115. The bases of the fourth and fifth transistors 114 and 115 are connected to a negative lead of a second voltage source. A positive lead of the second voltage source is connected to bases of the third and sixth transistors 113 and 116. A collector of the third transistor 113 is connected to a collector of the fifth transistor 115. A collector of the fourth transistor 114 is connected to a collector of the sixth transistor 116.
Referring now to FIG. 5A, a Gilbert Cell mixer 120 that is implemented using CMOS transistors according to the prior art is shown. The Gilbert cell mixer 120 includes a first transistor 122 and a second transistor 124, which have a source connected to a reference potential such as ground or virtual ground. A gate of the first transistor 122 is connected to one lead of a first voltage source. A gate of the second transistor 124 is connected to another lead of the first voltage source. The transistors 122 and 124 are used as a transconductor, which transforms a voltage signal to a current signal.
The CMOS Gilbert cell mixer 120 further includes third, fourth, fifth, and sixth transistors 130, 132, 134, and 136. A drain of the first transistor 122 is coupled to sources of the third and fourth transistors 130 and 132. A drain of the second transistor 124 is coupled to sources of the fifth and sixth transistors 134 and 136.
A gate of the fourth transistor 132 is connected to a gate of the fifth transistor 134. The gates of the fourth and fifth transistors 132 and 134 are connected to a first lead of a second voltage source. Another lead of the second voltage source is connected to gates of the third and sixth transistors 130 and 136. A drain of the third transistor 130 is connected to a drain of the fifth transistor 134. A drain of the fourth transistor 132 is connected to a drain of the sixth transistor 136. Typically, the first voltage source is a radio frequency, intermediate frequency, or baseband signal requiring frequency conversion (up or down) and the second voltage source is a local oscillator or a reference frequency.
Ideally, the second voltage source outputs a square wave for ideal switching of the transistors 130, 132, 134 and 136. However, the second voltage source typically outputs a sine wave. Conversion loss occurs, which is related to a difference between the ideal square wave and the actual sine wave. For portable applications, power consumption is extremely important. When using double conversion, extra current is consumed for the 2nd mixer compared with direct conversion. Furthermore, typical design constraints for designing mixers for transceivers include high third-order intermodulation intercept point (IP3) linearity and high conversion gain.
For CMOS transistors, high linearity can be achieved by increasing ID for a given transistor or effectively increasing the overdrive voltage. CMOS devices become more linear as with larger over drive voltage. As ID increases, however, a higher voltage drive must be used to turn on/off the transistors 130–136, which increases the power consumption of the circuit driving these transistors (or if the same driving voltage is applied, the switching becomes less ideal and adversely affects the conversion gain).